Palavra-chave: ANALYTICAL MODEL

LOW TEMPERATURE JUNCTIONLESS TRANSISTOR SPICE MODELING EFFECTIVE CHANNEL LENGTH SOI MOSFET PARAMETER EXTRACTION COMPACT MODELING PIEZOCOMPOSITE NANOWIRE-BASED TRANSISTORS GATE INDUCED DRAIN LEAKAGE DATA FITTING TEMPERATURE NANOTECNOLOGIA SOISPICE MOSFET LEAKAGE CURRENT MULTIPLE GATE VERILOG-A SIMULATION ANALOG APPLICATIONS SUBTHRESHOLD SLOPE STRAIN ACCUMULATIOM-MODE NANOELECTRONICS NANOWIRE FINFET GC SOI MOSFET DOUBLE GATE TRANSISTORS MATLAB PIN DIODE ELECTRICAL CHARACTERIZATION TRIPLE GATE SUBMICROM TRAP DENSITY JUNCTIONLESS NANOWIRE TRANSISTORS MOBILITY DEGRADATION THRESHOLD VOLTAGE HARMONIC DISTORTION LOW-FREQUENCY NOISE JUNCTIONLESS SERIES RESISTANCE TECNOLOGIA SOI SHORT-CHANNEL EFFECTS TRANSDERMAL TRANSPORT CRYOELECTRONICS THREE-DIMENSIONAL NUMERICAL SIMULATION DYNAMICMODEL NEW DEVICES