Palavra-chave: LOW TEMPERATURES

STACKED NANOWIRES FABRICATION PROCESS JUNCTIONLESS NANOWIRE TRANSISTORS FLOATING BODY TCAD TRIDIMENSIONAL SIMULATION MOSFET CRYOGENICS NANOELECTRONICS ANALOG APPLICATIONS STRAINED DEVICES DIODE GC SOI MOSFET CRYOELECTRONICS DIBL NANOWIRE-BASED TRANSISTORS SILICON GERMANIUM GRAIN DRYING SIMULATION OPERATIONAL RESEARCH DEEP-SUBMICROMETER HARMONIC DISTORTION OPTIMIZATION SOI MOSFET ELECTRICAL CHARACTERIZATION OXIDE CHARGES NANOWIRE DYNAMIC PROGRAMMING EXTRACTION METHOD DOUBLE GATE TRANSISTORS THRESHOLD VOLTAGE