Palavra-chave: CRYOGENICS

STACKED NANOWIRES LOW TEMPERATURES ELECTRICAL CHARACTERIZATION MULTIPLE-GATE TRANSISTORS NANOWIRE-BASED TRANSISTORS TEMPERATURE JUNCTIONLESS NANOWIRE TRANSISTORS CRYOELECTRONICS NANOWIRE MOSFET SELF-HEATING EFFECT THERMAL RESISTANCE GATE INDUCED DRAIN LEAKAGE SOI MOSFET COMPACT MODELING LOW TEMPERATURE CMOS TECHNOLOGY PARAMETER EXTRACTION SUBSTRATE BIAS NANOWIRE CMOS TCAD TRIDIMENSIONAL SIMULATION NANOSHEET MOSFET